Senior Control Algorithm & System Architecture Engineer
Ottawa, ONOn-siteFull Time
R
Ranovus
8+ YOECandidates need an MSc in electrical engineering with 8+ years or a PhD with 5+ years in digital or mixed-signal verification using SystemVerilog. They need understanding of feedback control, hardware bring-up and basic photonic components, plus Python or MATLAB skills.
SystemVerilog, Verilog-A, Python, MATLAB, SPICE