“RTL” jobs in Canada

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• 14d

  RTL Design Engineer

  Markham, ON

  Full Time

  AM

  Advanced Micro Devices, Inc

  Candidates need a Bachelor's or Master's degree in an electrical, computer or related engineering field, strong Verilog and SystemVerilog skills, scripting experience, and knowledge of AXI, AHB and AMBA protocols. Experience with ASIC design flows and processor or security subsystems is preferred.

  Verilog, SystemVerilog, Python, Tcl, Perl, Ruby

  16d

  RTL Design Engineer

  Markham, ON

  Full Time

  AM

  Advanced Micro Devices, Inc

  Candidates need a bachelor's or master's degree in electrical or computer engineering or a related field, with strong Verilog and SystemVerilog skills and knowledge of CPU and embedded processor architectures. Experience with AXI, AHB, AMBA and ASIC design tools is preferred.

  Verilog, SystemVerilog, Python, Tcl, Perl, Ruby

  28d

  Sr. Manager - RTL Design Manager

  Markham, ON

  Full Time

  AM

  Advanced Micro Devices, Inc

  Candidates need a proven record of engineering leadership and IP or RTL team management. They need strong Verilog/SystemVerilog skills, knowledge of ASIC design flows and a Bachelor's degree in engineering or computer science.

  Verilog, SystemVerilog, AMBA, AXI, AHB

  28d

  Senior ASIC RTL Design Engineer, AI Networking IP

  Ottawa, ON

  Full Time

  AM

  Advanced Micro Devices, Inc

  Candidates need a Bachelor's or Master's in computer or electrical engineering, and strong Verilog or SystemVerilog RTL design skills. Experience delivering ASIC or FPGA products, plus networking or high-speed interface knowledge, is preferred.

  Verilog, SystemVerilog, Synopsys tools, Cadence tools, Siemens (Mentor) tools, Python

  28d

  RTL Design Engineer

  Markham, ON

  Full Time

  AM

  Advanced Micro Devices, Inc

  Candidates need a Bachelor's or Master's degree in Electrical or Computer Engineering or Computer Science (Master's preferred), plus proven RTL design and verification experience. Strong Verilog, SystemVerilog, scripting, and bus protocol knowledge (AXI, AHB, AMBA) are expected.

  Verilog, Tcl, Ruby, Perl, Python, Makefile

  28d

  RTL Design Engineer

  Markham, ON

  Full Time

  AM

  Advanced Micro Devices, Inc

  Candidates need experience with I/O protocols such as USB, PCIe and CXL, plus RTL design for multi-clock, high-frequency, low-power designs. Strong analytical, communication and teamwork skills are expected, along with scripting in Python or Perl.

  RTL, DFT, Firmware, Analytical skills, Problem solving, Attention to detail

• 14d

  RTL Design Engineer

  Markham, ON

  Full Time

  AI

  AMD, Inc.

  AMD needs candidates with a Bachelor's or Master's degree in an electrical, computer or related engineering field, with Master's preferred. Strong skills in Verilog, SystemVerilog and scripting such as Python, Tcl or Perl are expected, along with knowledge of processor subsystems and ASIC design flows.

  Verilog, SystemVerilog, Python, Tcl, Perl, Ruby

  16d

  RTL Design Engineer

  Markham, ON

  Full Time

  AI

  AMD, Inc.

  Candidates need a strong background in RTL design, Verilog and SystemVerilog, and scripting in Python, Tcl, Perl, Ruby, or Make. Experience with AXI, AHB, AMBA protocols, ASIC design tools, and a Bachelor's or Master's degree in electrical or computer engineering are expected.

  Verilog, SystemVerilog, C-DPI, FPGA, ASIC simulation and synthesis tools

  23d

  RTL Design Engineer

  Markham, ON

  Full Time

  AI

  AMD, Inc.

  Candidates need a Bachelor's or Master's degree in electrical or computer engineering, computer science or a related field, with Verilog and SystemVerilog skills, scripting experience, and knowledge of bus protocols such as AXI and AHB. Experience with ASIC design tools and CPU or microprocessor subsystem architecture is preferred.

  Verilog, Tcl, Ruby, Perl, Python, Makefile

  23d

  RTL Design Engineer

  Markham, ON

  Full Time

  AI

  AMD, Inc.

  Candidates need experience with I/O protocols such as USB, PCIe and CXL, plus RTL design for multi-clock, high-frequency, low-power designs. A bachelor's or master's degree in electrical engineering or equivalent is preferred.

  Python, Perl

  23d

  Senior ASIC RTL Design Engineer, AI Networking IP

  Ottawa, ON

  Full Time

  AI

  AMD, Inc.

  Candidates need proven RTL design experience in Verilog or SystemVerilog, ASIC or FPGA delivery experience, and a bachelor's or master's degree in computer or electrical engineering. Networking or high-speed interface knowledge, such as Ethernet or PCIe, is preferred.

  Verilog, SystemVerilog, Synopsys tools, Cadence tools, Siemens (Mentor) tools, Python

  23d

  Sr. Manager - RTL Design Manager

  Markham, ON

  Full Time

  AI

  AMD, Inc.

  AMD needs a leader with experience managing IP or RTL design teams and strong Verilog/SystemVerilog skills. Candidates should know RTL microarchitecture, ASIC verification flows and on-chip protocols such as AXI and AHB, and hold a bachelor's degree in an engineering or computer discipline.

  Verilog, SystemVerilog

• 19d

  RTL Design Engineer - AI Tools

  Toronto, ON

  $100–$175/hr

  

  Mercor

  3+ YOECandidates need 3 to 10 years of digital RTL design or design verification experience, strong Verilog, SystemVerilog and UVM skills, and solid digital design fundamentals. Experience with ASIC design flows and EDA tools is also required.

  Verilog, SystemVerilog, UVM, EDA tools

• 28d

  RTL Engineer

  Burnaby, BC

  $106k–$158k/yrFull Time

  SS

  SEL Schweitzer Laboratories, Inc.

  5+ YOECandidates need a B.S. in Electrical Engineering or equivalent, plus 5+ years of combined FPGA RTL design in VHDL or Verilog, firmware in C/C++, and functional verification experience. Strong technical writing, teamwork and mentoring skills are required.

  VHDL, Verilog, Xilinx tools, Intel FPGA (Altera) tools, Microchip (Microsemi/Actel) tools, Lattice Semiconductor tools

• 29d

  Senior I/O Chiplet RTL Design Engineer

  Ottawa, ON

  Full Time

  

  BTA Design Services: specializes in ASIC and FPGA design and verification services, custom IP development, embedded software, and DevOps capabilities creation.

  10+ YOECandidates need 10+ years of hands-on ASIC RTL design with tape-out ownership, strong SystemVerilog and Verilog skills, and experience with high-speed interfaces such as PCIe, Ethernet or die-to-die links. They also need synthesis, timing constraint and CDC/RDC expertise, plus scripting in Python or Tcl.

  SystemVerilog, Verilog, Python, Tcl

• 29d

  Sr Staff Engineer, SoC RTL Design

  Toronto, ON

  

  Tenstorrent: Tenstorrent is a next-generation computing company that builds computers for AI.

  Candidates need deep knowledge of computer architecture and chip microarchitecture, plus hands-on RTL design in Verilog or VHDL and familiarity with full ASIC flows. Experience optimizing for power, performance and area, and working collaboratively on specifications and design reviews, is needed. Prior work on on-chip fabric or interconnect design is an asset.

  Verilog, VHDL, FPGA, UVM, emulation platforms

• 29d

  CPU Micro-Architect / RTL (Lead & IC Engineers)

  Canada

  HybridFull Time

  

  NUVACORE

  7+ YOECandidates need a BS or MS with 15+ years of CPU design experience for leads or 7+ years for individual contributors. They must know Verilog, simulation and logic and physical design, and understand RISC-V, ARM64 or x86 ISAs.

  Verilog, AI tools for RTL coding, simulation tools, emulation

• 3h

  Technicien(ne) juridique

  Longueuil, QC

  

  RTL

  3+ YOECandidates need a DEC or equivalent in administration or law and 3 to 5 years of relevant experience. Strong French, functional English, legal drafting ability, and mastery of office and specialized software are required.

  3d

  Conseiller(ère) en gestion financière

  Longueuil, QC

  

  RTL

  5+ YOEBaccalauréat en administration, option comptabilité, ou équivalent; Membre de l'Ordre des CPA du Québec; 5 ans et plus d'expérience pertinente

  Financial management, RTL, Accounting, Documentation, Problem solving, Financial statements

  3d

  Administrateur(-rice) - Infrastructure et cybersécurité (Profil Cybersécurité)

  Longueuil, QC

  

  RTL

  3+ YOECertificat universitaire ou équivalent en informatique; 3 à 5 ans et plus d'expérience pertinente; Maîtrise de Windows, Linux et Azure

  Azure, VMware, Microsoft Sentinel, FortiGate, Cisco, Active Directory

  7d

  Coordonnateur(-rice) technique des travaux de construction

  Longueuil, QC

  

  RTL

  6+ YOEBaccalauréat en ingénierie, architecture ou discipline pertinente; Six ans d'expérience en coordination de projets de construction; Connaissance approfondie des normes et règlements de construction

  RTL, Process improvement, Logistics, Inspection, Documentation, Valid driver's licence

  7d

  Contrôleur(-euse) de projets (PCO)

  Longueuil, QC

  

  RTL

  5+ YOEDiplôme universitaire en ingénierie, gestion de projets ou construction; Minimum de cinq ans d'expérience en contrôle ou planification de projets de construction; Expérience significative en analyse d'échéanciers de cons

  Primavera P6, Microsoft Project, Microsoft Office

  7d

  Coordonnateur (trice) planification financière et performance

  Longueuil, QC

  

  RTL

  6+ YOEBaccalauréat en comptabilité, administration des affaires ou finances; Minimum six ans d'expérience en planification financière ou budgétisation; Membre de l'Ordre des CPA

  Excel, Power BI

  15d

  Directeur (trice) finances et trésorier (ère) adjoint (e)

  Longueuil, QC

  

  RTL

  12+ YOE5+ MgmtBaccalauréat en comptabilité, administration ou finances; Membre de l'ordre des CPA; Plus de 12 ans d'expérience en gestion financière

  Excel, Microsoft Office

8 companies