“UCIe” jobs in Canada

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• 7d

  FY27 Intern - Silicon Validation Internship - Canada (16 months)

  Toronto, ON

  On-siteInternship

  QC

  Qualcomm Canada ULC

  1+ YOEQualcomm Canada needs students in an engineering or computer science bachelor's program, available May/June 2027 to August/September 2028, with 1+ years of programming experience. Lab equipment experience and scripting in Python, Perl, TCL or Shell are preferred.

  oscilloscope, multimeter, Python, Perl, TCL, Shell

  7d

  Customer Program Manager, Staff

  Toronto, ON

  On-site

  QC

  Qualcomm Canada ULC

  5+ YOECandidates need a relevant engineering or computer science degree and 5+ years of program management experience. Schedule tools such as MS Project, JIRA and Confluence, and PMP certification, are assets.

  MS Office Project, JIRA, Confluence

  7d

  Application Engineer, Sr Staff

  Toronto, ON

  On-site

  QC

  Qualcomm Canada ULC

  6+ YOECandidates need a bachelor's degree in electrical or computer engineering plus 6 or more years of hardware experience, or an equivalent advanced degree with fewer years. They need strong debugging skills, C/C++ for embedded systems, and Python for test automation.

  Oscilloscope, BERT, Protocol analyzer

  7d

  FY27 Intern - Firmware/Embedded Software Engineering Internship - Canada (12 or 16 months)

  Toronto, ON

  On-siteInternship

  QC

  Qualcomm Canada ULC

  1+ YOECandidates need to be enrolled in a bachelor's degree in electrical or computer engineering, engineering science or computer science, with at least one year of academic programming experience in C, C++ or Python. Strong debugging, problem-solving and teamwork skills are needed, and availability must match the 12- or 16-month internship dates.

  Git, Linux, FPGA, Verilog, SystemVerilog, GitHub Actions

  28d

  Firmware Engineer, Principal

  Toronto, ON

  On-site

  QC

  Qualcomm Canada ULC

  8+ YOECandidates need an engineering or computer science degree plus 8+ years of software engineering experience, or a master's with 7+ years. They also need 4+ years coding in C, C++, Java or Python, strong embedded firmware and lab debug skills, and team leadership experience.

  Git, Python, RISC-V

  28d

  High Speed Validation Engineer, Senior

  Toronto, ON

  On-site

  QC

  Qualcomm Canada ULC

  2+ YOECandidates need a bachelor's degree with 2+ years of ASIC work, or a master's with 1+ year, or a PhD. They need hands-on high speed interface validation, SerDes knowledge, Python or C/C++ scripting, and lab instrument automation.

  BERT, Logic analyzer, VNA, Power supplies, Multimeter, SIGTEST

  29d

  Firmware Engineer – SerDes PHY (all levels)

  Toronto, ON

  On-site

  QC

  Qualcomm Canada ULC

  6+ YOECandidates need an engineering or computer science degree and 4 to 6+ years of software engineering experience, depending on degree level. They also need at least 3 years of programming experience in languages such as C, C++, Java or Python.

  JTAG debuggers, git, Verilog, SystemVerilog

• 17d

  Principal Analog Design Engineer-19318

  Markham, ON

  S

  Synopsys

  6+ YOECandidates need a PhD with 6+ years or a Master's with 8+ years of analog and mixed-signal IC design experience, including FinFET circuit design. Strong transistor-level CMOS and SPICE simulation skills are required.

  Spectre, HSPICE, Verilog-A, schematic entry tools, Python, Perl

• 19d

  Sr. AV Programmer

  Mississauga, ON +1

  D

  Diversified

  7+ YOECandidates need at least 7 years of audio visual control system development experience, plus skills in Crestron, Q-SYS or Extron platforms and modern programming languages. An associate or bachelor's degree or equivalent experience, and an AVIXA CTS certification within 12 months, are also required.

  Crestron, Q-SYS, Extron, Git, Figma, Docker

• 23d

  Program Manager – High-Speed SerDes IP

  Toronto, ON

  T

  Talentlab

  8+ YOECandidates need 8+ years in the semiconductor industry with a focus on high-speed SerDes IP, a Bachelor's in Electrical Engineering or a related field, and a solid understanding of IP deliverables and integration. PMP certification and ASIC or protocol knowledge are assets.

  Jira, MS Office

• 24d

  Lead Diagnostics Software Engineer, ATE Integration

  Markham, ON

  Full Time

  AI

  AMD, Inc.

  8+ YOEAMD, Inc. asks for 8+ years of silicon engineering experience in validation, diagnostics or test, strong C/C++ and Python skills, and hands-on ATE experience. Candidates also need knowledge of structural pattern generation and GFX or compute architectures, and a bachelor's, master's or PhD in an engineering or computer science field.

  V93000, UltraFLEX, GitHub, CI/CD pipelines, C/C++, Python

  24d

  Silicon Design Engineer - Technical Lead

  Markham, ON

  Full Time

  AI

  AMD, Inc.

  AMD needs candidates with experience in I/O protocols such as USB, PCIe and CXL, plus micro-architecture and RTL design for multi-clock, high-frequency, low-power designs. A master's or bachelor's in electrical engineering or equivalent is preferred.

  Python, Perl

  24d

  RTL Design Engineer

  Markham, ON

  Full Time

  AI

  AMD, Inc.

  Candidates need experience with I/O protocols such as USB, PCIe and CXL, plus RTL design for multi-clock, high-frequency, low-power designs. A bachelor's or master's degree in electrical engineering or equivalent is preferred.

  Python, Perl

• 26d

  Principal Product Applications Engineer

  Ottawa, ON

  Full Time

  LE

  Leading Edge

  8+ YOECandidates need a technical bachelor's degree and 8+ years in product applications, systems engineering or post-silicon validation with high-speed connectivity. They need hands-on lab bring-up skills, experience with hyperscalers, Tier-1 OEMs or ODMs, and strong presentation skills.

  Oscilloscope, BERT, Protocol analyzer, Python

• 26d

  Senior SoC Architect (f/m/d)

  Toronto, ON

  RemoteFull Time

  

  Black Semiconductor GmbH

  7+ YOECandidates need 7 to 10 years of SoC or product architecture experience, including taking a product from market requirements to a detailed design. Deep high-speed I/O expertise (SerDes, UCIe, PCIe, Ethernet) and experience with on-chip interconnects are essential.

  Python, C++

• 28d

  Sr. Manager, Physical Design Engineering, Annapurna Labs

  Toronto, ON

  Full Time

  AD

  Amazon Development Centre Canada ULC

  10+ YOE5+ MgmtAmazon Development Centre Canada needs 5+ years leading physical design teams of 8+ engineers and 10+ years of hands-on ASIC/SoC physical design across advanced nodes. Candidates must master both Synopsys and Cadence EDA tools, advanced STA and power integrity, and hierarchical flows for very large SoCs.

  Synopsys Fusion Compiler, ICC2, PrimeTime, StarRC, RedHawk-SC, Cadence Innovus

  28d

  Design Verification Engineer, Annapurna Labs

  Toronto, ON

  Full Time

  AD

  Amazon Development Centre Canada ULC

  4+ YOECandidates need a bachelor's degree in electrical engineering or a related field and at least 4 years of design verification experience using constrained-random simulation such as UVM. Strong debugging skills across IP, SoC and full-system levels are required.

  UVM, Python, Perl, C++

  28d

  Design Verification Engineer - technical lead, Annapurna Labs

  Toronto, ON

  Full Time

  AD

  Amazon Development Centre Canada ULC

  8+ YOECandidates need a bachelor's degree in electrical engineering or a related field and 8+ years of constrained-random verification experience (such as UVM), including testbench development. Experience across IP, SoC and full-system verification, plus formal, emulation or scripting skills, is highly desired.

  UVM, formal verification tools, emulation platforms, Python, Perl

• 28d

  Lead Diagnostics Software Engineer, ATE Integration

  Markham, ON

  Full Time

  AM

  Advanced Micro Devices, Inc

  8+ YOEAMD needs 8+ years of silicon engineering experience, strong C/C++ and Python skills, and hands-on ATE experience such as V93000 or UltraFLEX. Candidates should know structural pattern generation and data center GPU and HBM architectures, and hold a relevant engineering or computer science degree.

  V93000, UltraFLEX, GitHub, CI/CD pipelines

  29d

  Silicon Design Engineer - Technical Lead

  Markham, ON

  Full Time

  AM

  Advanced Micro Devices, Inc

  Advanced Micro Devices needs candidates with experience in I/O protocols such as USB, PCIe and CXL, plus micro-architecture and RTL design for high-speed, low-power digital blocks. A master's or bachelor's degree in electrical engineering or equivalent is preferred.

  Python, Perl

  29d

  RTL Design Engineer

  Markham, ON

  Full Time

  AM

  Advanced Micro Devices, Inc

  Candidates need experience with I/O protocols such as USB, PCIe and CXL, plus RTL design for multi-clock, high-frequency, low-power designs. Strong analytical, communication and teamwork skills are expected, along with scripting in Python or Perl.

  RTL, DFT, Firmware, Analytical skills, Problem solving, Attention to detail

• 29d

  Compliance Administrator

  Vancouver, BC

  

  Ventum Financial Corp.

  2+ YOECandidates need 2 to 3 years of financial services experience and some post-secondary education. They must be proficient in Microsoft Word and Excel, detail-oriented, organized and discreet with confidential information. Dataphile experience is an asset.

  Dataphile, Microsoft Word, Microsoft Excel

• 29d

  Senior I/O Chiplet Verification Engineer

  Ottawa, ON

  Full Time

  

  BTA Design Services: specializes in ASIC and FPGA design and verification services, custom IP development, embedded software, and DevOps capabilities creation.

  10+ YOECandidates need 10 or more years of hands-on ASIC verification experience through tape-out sign-off, strong SystemVerilog and UVM skills, and experience with high-speed interfaces or die-to-die interconnect. Scripting, regression automation and clear written communication are essential.

  SystemVerilog, UVM, UPF

  29d

  Senior I/O Chiplet RTL Design Engineer

  Ottawa, ON

  Full Time

  

  BTA Design Services: specializes in ASIC and FPGA design and verification services, custom IP development, embedded software, and DevOps capabilities creation.

  10+ YOECandidates need 10+ years of hands-on ASIC RTL design with tape-out ownership, strong SystemVerilog and Verilog skills, and experience with high-speed interfaces such as PCIe, Ethernet or die-to-die links. They also need synthesis, timing constraint and CDC/RDC expertise, plus scripting in Python or Tcl.

  SystemVerilog, Verilog, Python, Tcl

11 companies