Analog Design, Architect - 18618
Mississauga, ONS
Synopsys
10+ YOECandidates need a PhD with 10+ years or MSc with 12+ years of SerDes or high-speed analog design experience. Synopsys expects silicon-proven TX, RX and clock circuit work, transistor-level CMOS and FinFET layout skills, and some leadership of small teams.
SPICE, Verilog-A, TCL, Perl, C, Python