Principal SerDes System/DSP Design Engineer
Ottawa, ON +1Ciena Canada ULC
8+ YOECandidates need a Ph.D. in Electrical Engineering with 8+ years in high-speed serial link or communication system design. Required skills include SerDes DSP design, adaptive equalization, MLSD, timing recovery, FEC modeling, IMDD optical familiarity, and MATLAB, Python or C/C++.
MATLAB, Python, C/C++
Principal Analog Circuit Designer
Ottawa, ONCiena Canada ULC
7+ YOECandidates need a Master's degree in an engineering or applicable science field and 7+ years of advanced CMOS or BiCMOS design experience. They must have mm-wave analog design experience and skill with Cadence Virtuoso, Calibre, STAR-RC and MMSIM.
Cadence Virtuoso, Calibre, STAR-RC, MMSIM, HFSS, EMX
Ingénieur en test de circuits photoniques / Photonics Test Engineer
Quebec +1Ciena Canada ULC
Candidates need a master's or PhD in optics, physics, electrical engineering or a related field, plus silicon photonics experience and test engineering experience. Proficiency in Matlab, Python or C# and fluent English are required.
Matlab, Python, C#, RF test instruments