Senior FPGA Engineer (Hybrid)
Burnaby, BCKardium Inc.
5+ YOECandidates need a bachelor's degree or higher in an engineering field and at least 5 years of FPGA development and verification experience. They need strong VHDL skills, experience with Vivado and Active-HDL, and knowledge of timing closure, AXI interfaces and clock domain crossing.
Vivado, Active-HDL, logic analyzer, oscilloscope, Git, Aldec ALINT
FPGA Team Lead (Hybrid)
Burnaby, BCKardium Inc.
5+ YOE1+ MgmtKardium needs a candidate with a bachelor's degree or higher in electrical or computer engineering, at least 5 years of hands-on FPGA design and verification, and 1 to 2 years leading engineering teams. Strong VHDL, Xilinx/AMD toolchain and regulated medical device experience are key.
Vivado, Vitis, Altium Designer, ModelSim, Questa, Active-HDL