FY27 Intern - Camera HW ASIC Verification Intern - Canada (12 or 16 months)
Vancouver, BCQualcomm Canada ULC
1+ YOECandidates need Verilog or SystemVerilog skills, ASIC design verification experience and scripting ability. Study toward a bachelor's degree in electrical, computer or a related engineering field is required.
Verilog, UVM, Python, Perl
Firmware Engineer, Principal
Toronto, ONQualcomm Canada ULC
8+ YOECandidates need an engineering or computer science degree plus 8+ years of software engineering experience, or a master's with 7+ years. They also need 4+ years coding in C, C++, Java or Python, strong embedded firmware and lab debug skills, and team leadership experience.
Git, Python, RISC-V
Firmware Engineer – SerDes PHY (all levels)
Toronto, ONQualcomm Canada ULC
6+ YOECandidates need an engineering or computer science degree and 4 to 6+ years of software engineering experience, depending on degree level. They also need at least 3 years of programming experience in languages such as C, C++, Java or Python.
JTAG debuggers, git, Verilog, SystemVerilog
Senior ASIC Design Verification Engineer, Compute DSP/AI Processors (multiple levels)
Markham, ONQualcomm Canada ULC
4+ YOECandidates need an engineering degree and, for senior roles, several years of ASIC design or verification experience. Strong skills in UVM, SystemVerilog, digital logic and scripting in Python or CShell are expected, along with good problem solving and communication.
SystemVerilog, UVM, Python, CShell